The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7516173 B1

PDF
Full Text
Expired
Date of Patent:
Apr. 07, 2009

Filed:

Aug. 04, 2004
Applicant:

Sapumal Wijeratne, Portland, OR (US);

Inventor:

Sapumal Wijeratne, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 7/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

A multi-bit adder includes a carry chain, a carry-skip network, sum cells, and a carry-sum cell. The carry chain propagates, generates, or kills carry-in bits. The carry-skip network is coupled to the carry chain to selectively skip the carry-in bits over at least one portion of the carry chain. The sum cells are coupled along the carry chain to sum the carry-in bits with corresponding bits of two operands to generate a multi-bit resultant. The carry-sum cell is coupled to receive one of the carry-in bits to a single intermediate bit position on the carry chain and to generate one bit of the multi-bit resultant having a more significant bit position than the single intermediate bit position.


Find Patent Forward Citations

Wijeratne, Sapumal. (2009). Carry-skip adder having merged carry-skip cells with sum cells (U.S. Patent No. 7516173). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7516173

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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