The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 31, 2009
Filed:
Dec. 19, 2006
Manoj Mehrotra, Plano, TX (US);
Karen Hildegard Ralston Kirmse, Richardson, TX (US);
Shirin Siddiqui, Plano, TX (US);
Manoj Mehrotra, Plano, TX (US);
Karen Hildegard Ralston Kirmse, Richardson, TX (US);
Shirin Siddiqui, Plano, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
Slim spacers are implemented in transistor fabrication. More particularly, wide sidewall spacers are initially formed and used to guide dopants into source/drain regions in a semiconductor substrate. The wide sidewall spacers are then removed and slim sidewall spacers are formed alongside a gate stack of the transistor. The slim spacers facilitate transferring stress from an overlying pre metal dielectric (PMD) liner to a channel of the transistor, and also facilitate reducing a resistance in the transistor by allowing silicide regions to be formed closer to the channel. This mitigates yield loss by facilitating predictable or otherwise desirable behavior of the transistor.