The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 31, 2009

Filed:

Jan. 30, 2007
Applicants:

Igor Sankin, Starkville, MS (US);

Janna B. Casady, Starkville, MS (US);

Joseph N. Merrett, Starkville, MS (US);

Inventors:

Igor Sankin, Starkville, MS (US);

Janna B. Casady, Starkville, MS (US);

Joseph N. Merrett, Starkville, MS (US);

Assignee:

SemiSouth Laboratories, Inc., Starkville, MS (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/338 (2006.01);
U.S. Cl.
CPC ...
Abstract

A self-aligned silicon carbide power MESFET with improved current stability and a method of making the device are described. The device, which includes raised source and drain regions separated by a gate recess, has improved current stability as a result of reduced surface trapping effects even at low gate biases. The device can be made using a self-aligned process in which a substrate comprising an n-doped SiC layer on an n-doped SiC channel layer is etched to define raised source and drain regions (e.g., raised fingers) using a metal etch mask. The metal etch mask is then annealed to form source and drain ohmic contacts. A single- or multilayer dielectric film is then grown or deposited and anisotropically etched. A Schottky contact layer and a final metal layer are subsequently deposited using evaporation or another anisotropic deposition technique followed by an optional isotropic etch of dielectric layer or layers.


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