The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 17, 2009
Filed:
Mar. 27, 2007
Jerome M. Eldridge, Los Gatos, CA (US);
Kie Y. Ahn, Chappaqua, NY (US);
Leonard Forbes, Corvallis, OR (US);
Jerome M. Eldridge, Los Gatos, CA (US);
Kie Y. Ahn, Chappaqua, NY (US);
Leonard Forbes, Corvallis, OR (US);
Micron Technology, Inc., Boise, ID (US);
Abstract
Structures and methods for programmable array type logic and/or memory devices with asymmetrical low tunnel barrier intergate insulators are provided. The programmable array type logic and/or memory devices include non-volatile memory which has a first source/drain region and a second source/drain region separated by a channel region in a substrate. A floating gate opposing the channel region and is separated therefrom by a gate oxide. A control gate opposes the floating gate. The control gate is separated from the floating gate by an asymmetrical low tunnel barrier intergate insulator formed by atomic layer deposition. The asymmetrical low tunnel barrier intergate insulator includes a metal oxide insulator selected from the group consisting of AlO, TaO, TiO, ZrO, NbO, SrBiTaO, SrTiO, PbTiO, and PbZrO.