The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 10, 2009
Filed:
Jun. 16, 2005
Matt Boucher, Colchester, VT (US);
John M. Cohn, Richmond, VT (US);
Richard Dauphin, Shelburne, VT (US);
Mark Masters, Essex Junction, VT (US);
Judith H. Mccullen, Essex Junction, VT (US);
Sarah C. Braasch, Richmond, VT (US);
Michael H. Sitko, Jericho, VT (US);
Matt Boucher, Colchester, VT (US);
John M. Cohn, Richmond, VT (US);
Richard Dauphin, Shelburne, VT (US);
Mark Masters, Essex Junction, VT (US);
Judith H. McCullen, Essex Junction, VT (US);
Sarah C. Braasch, Richmond, VT (US);
Michael H. Sitko, Jericho, VT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
The invention provides a method, system, and program product for diagnosing an integrated circuit. In particular, the invention captures one or more images for each relevant circuit layer of the integrated circuit. Based on the image(s), a component netlist is generated. Further, a logic netlist is generated by applying hierarchical composition rules to the component netlist. The component netlist and/or logic netlist can be compared to a reference netlist to diagnose the integrated circuit. The invention can further generate a schematic based on the component netlist or logic netlist in which components are arranged according to port, power, and/or component pin connection information determined from the netlist. Further, the schematic can be displayed in a manner that wiring connections are selectively displayed to assist a user in intelligently arranging the circuit components.