The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 03, 2009

Filed:

Jul. 07, 2005
Applicants:

Freidoon Mehard, Plano, TX (US);

Shafoeng Yu, Plano, TX (US);

Joe G. Tran, Flower Mound, TX (US);

Inventors:

Freidoon Mehard, Plano, TX (US);

Shafoeng Yu, Plano, TX (US);

Joe G. Tran, Flower Mound, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/302 (2006.01); H01L 21/461 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention provides a method of fabricating a microelectronics device. In one aspect, the method comprises forming a spacer materialover gate electrodesthat are, in turn, located over a microelectronics substrate. The gate electrodeshave a doped regionlocated between them. A portion of the spacer materialis removed with a chemical/mechanical process using a slurry that is selective to a portion of the spacer material. The method further comprises etching a remaining portion of the spacer materialto form spacer sidewallson the gate electrodes. The etching exposes a surface of the gate electrodesand leaves a portion of the spacer materialover the doped region. Metal is then incorporated into the gate electrodesto form silicided gate electrodes


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