The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 24, 2009
Filed:
Aug. 29, 2006
Mi-chang Chang, Hsinchu, TW;
Su-ya Lin, Alian Township, Kaohsiung County, TW;
Jen-hang Yang, Yonghe, TW;
Li-chun Tien, Tainan, TW;
Mi-Chang Chang, Hsinchu, TW;
Su-Ya Lin, Alian Township, Kaohsiung County, TW;
Jen-Hang Yang, Yonghe, TW;
Li-Chun Tien, Tainan, TW;
Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;
Abstract
This invention discloses a method for automatically adjusting cell layout height and transistor width of one type of MOS IC cells, the method comprising following steps of Boolean logic operations on at least one such cell: identifying one or more MOS transistor active areas (ODs) and one or more power ODs in an OD layer, expanding the MOS transistor ODs in a predetermined direction by a first predetermined amount, shifting the power ODs in the predetermined direction by a second predetermined amount, expanding one or more MOS transistor gate areas in the predetermined direction by a third predetermined amount, shifting one or more power OD contacts in the predetermined direction by approximately the second predetermined amount, and stretching one or more metal areas (Ms) in a metal layer that is directly coupled to the OD layer through contacts electronically, in the predetermined direction by a predetermined way.