The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 24, 2009
Filed:
Jan. 30, 2007
Rajiv V. Joshi, Yorktown Heights, NY (US);
Jae-joon Kim, Yorktown Heights, NY (US);
Rahul M. Rao, Elmsford, NY (US);
Rajiv V. Joshi, Yorktown Heights, NY (US);
Jae-Joon Kim, Yorktown Heights, NY (US);
Rahul M. Rao, Elmsford, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
In a memory circuit, data from all cells along a selected word line is read. Then, the read data is written back to half-selected cells and new data is written to the selected cells in the next cycle. In cases where a READ bit line (RBL) and WRITE bit line (WBL) are decoupled, RBL and WBL can be accessed simultaneously. Hence, the WRITE in the n-th cycle can be delayed to the n+1-th cycle as far as there is no data hazard such as reading data from memory before correct data are actually written to memory. As a result, there is no bandwidth loss, although the latency of the WRITE operation increases. WRITE stability issues in previous configurations with decoupled RBL and WBL are thus addressed.