The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 17, 2009
Filed:
May. 15, 2000
Dan Feng, Los Altos, CA (US);
Joel R. Phillips, Sunnyvale, CA (US);
Kenneth Kundert, Los Altos, CA (US);
Dan Feng, Los Altos, CA (US);
Joel R. Phillips, Sunnyvale, CA (US);
Kenneth Kundert, Los Altos, CA (US);
Cadence Design Systems, Inc., San Jose, CA (US);
Abstract
Described is a process for performing an improved mixed frequency-time algorithm to simulate responses of a circuit that receives a periodic sample signal and at least one information signal. The process selects a set of evenly spaced distinct time points and a set of reference time points. Each of the reference points is associated with a distinct time point, and a reference time point is a signal period away from its respective distinct time point. The process finds a first set of relationships between the values at the distinct time points and the values at the reference time points. The process also finds a second set of relationships between the values at the distinct time points and the values at the reference time points. The process then combines the first and second sets of relationships to establish a system of nonlinear equations in terms of the values at the distinct time points only. By solving the system of nonlinear equations, the process finds simulated responses of the circuit in time domain. The process then converts the simulated circuit responses from time domain to frequency domain.