The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 10, 2009
Filed:
Jan. 26, 2007
Toshio Mochizuki, Tokyo, JP;
Takanobu Ambo, Tokyo, JP;
Toshio Mochizuki, Tokyo, JP;
Takanobu Ambo, Tokyo, JP;
Renesas Technology Corp., Tokyo, JP;
Abstract
Disclosed herein is a semiconductor integrated circuit device such as a for-camera preprocessing LSI suitable for a semiconductor integrated circuit and having improved responsiveness. In a D/A converter circuit for generating a feedback signal for compensating for black level variation in a for-camera preprocessing LSI, first-conductivity-type MOSFETs as first current sources produce currents corresponding to digital signals. The digital signals are supplied to first-conductivity-type first differential MOSFETs and second-conductivity-type second differential MOSFETs, with the gates and drains of the first differential MOSFETs and the gates and drains of the second differential MOSFETs being connected together respectively. There is provided a differential amplifier circuit in which a bias voltage is supplied to a noninverting input terminal thereof and an inverting input terminal thereof is connected to an analog current output node which is the drains connected together of one sides of the first differential MOSFETs, and a resistive element is provided between the inverting input terminal and an output terminal thereof. A converted analog output voltage is generated at the output terminal, and a voltage equal to the bias voltage is supplied to drains of the other sides of the first differential MOSFETs.