The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 03, 2009

Filed:

Aug. 30, 2005
Applicant:

Hwi-huang Chen, Hsinchu, TW;

Inventor:

Hwi-Huang Chen, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/76 (2006.01);
U.S. Cl.
CPC ...
Abstract

A high voltage MOS transistor including a substrate, a well, a gate insulation layer, a gate, two drift regions, a channel region, a source/drain region and an isolation structure is provided. The well is disposed in the substrate and the gate insulation layer is disposed over the substrate. The gate is disposed over the gate insulation layer. The two drift regions are in the well at two sides of the gate and the width of the gate is smaller than or equal to that of the drift regions. The channel region is disposed between the drift regions and the width of the channel region is greater than that of the drift regions. The source/drain regions are formed within the drift regions. The isolation structure is disposed inside the drift regions between the source/drain region and the channel region. The drift regions enclose the source/drain regions and the isolation structure.


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