The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 27, 2009
Filed:
Sep. 24, 2004
Robert John Wojnarowski, Ballston Lake, NY (US);
Stanton Earl Weaver, Jr., Northville, NY (US);
Abasifreke Udo Ebong, Marietta, GA (US);
Xian an (Andrew) Cao, Kingston, NY (US);
Steven Francis Leboeuf, Schenectady, NY (US);
Larry Burton Rowland, Scotia, NY (US);
Stephen D. Arthur, Glenville, NY (US);
Robert John Wojnarowski, Ballston Lake, NY (US);
Stanton Earl Weaver, Jr., Northville, NY (US);
Abasifreke Udo Ebong, Marietta, GA (US);
Xian An (Andrew) Cao, Kingston, NY (US);
Steven Francis LeBoeuf, Schenectady, NY (US);
Larry Burton Rowland, Scotia, NY (US);
Stephen D. Arthur, Glenville, NY (US);
Lockheed Martin Corporation, Bethesda, MD (US);
Abstract
The present invention is directed towards a source of ultraviolet energy, wherein the source is a UV-emitting LED's. In an embodiment of the invention, the UV-LED's are characterized by a base layer material including a substrate, a p-doped semiconductor material, a multiple quantum well, a n-doped semiconductor material, upon which base material a p-type metal resides and wherein the base structure has a mesa configuration, which mesa configuration may be rounded on a boundary surface, or which may be non-rounded, such as a mesa having an upper boundary surface that is flat. In other words, the p-type metal resides upon a mesa formed out of the base structure materials. In a more specific embodiment, the UV-LED structure includes n-type metallization layer, passivation layers, and bond pads positioned at appropriate locations of the device. In a more specific embodiment, the p-type metal layer is encapsulated in the encapsulating layer.