The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 20, 2009
Filed:
Dec. 29, 2005
Applicants:
Alan Lee Holesovsky, Loveland, CO (US);
Viswanathan Lakshmanan, Thornton, CO (US);
Brent Wray Acott, Fort Collins, CO (US);
Inventors:
Alan Lee Holesovsky, Loveland, CO (US);
Viswanathan Lakshmanan, Thornton, CO (US);
Brent Wray Acott, Fort Collins, CO (US);
Assignee:
LSI Logic Corportion, Milpitas, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract
A method and system for validating selected layers of an integrated circuit design. A rundeck is edited to include IC layers and device structures of interest that may require validation. In some embodiments the IC layer of interest may include only metal. A layout versus schematic (LVS) comparison is performed using the edited rundeck and an error report is generated.