The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 20, 2009
Filed:
Mar. 23, 2006
Applicants:
Chris Wilkerson, Portland, OR (US);
Shih-lien L. LU, Portland, OR (US);
Edward Grochowski, San Jose, CA (US);
Murali Annavaram, Austin, TX (US);
Inventors:
Chris Wilkerson, Portland, OR (US);
Shih-Lien L. Lu, Portland, OR (US);
Edward Grochowski, San Jose, CA (US);
Murali Annavaram, Austin, TX (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
G06K 5/04 (2006.01);
U.S. Cl.
CPC ...
Abstract
Methods and systems to facilitate an efficient circuit for detecting internal timing errors for integrated devices, including a hierarchy of reporting the detection of the timing error from a circuit level to a functional unit block (FUB) level up to a global detection, and a reorder buffer (ROB) for storing a result for timing error recovery until the timing can be verified to be error free.