The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 06, 2009

Filed:

May. 31, 2004
Applicants:

Haruyuki Sorada, Hirakata, JP;

Takeshi Takagi, Kyoto, JP;

Akira Asai, Osaka, JP;

Yoshihiko Kanzawa, Yawata, JP;

Kouji Katayama, Nara, JP;

Junko Iwanaga, Shijonawata, JP;

Inventors:

Haruyuki Sorada, Hirakata, JP;

Takeshi Takagi, Kyoto, JP;

Akira Asai, Osaka, JP;

Yoshihiko Kanzawa, Yawata, JP;

Kouji Katayama, Nara, JP;

Junko Iwanaga, Shijonawata, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/088 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor device according to this invention includes: a first insulating layer (); a first body section () including an island-shaped semiconductor formed on the first insulating layer; a second body section () including an island-shaped semiconductor formed on the first insulating layer; a ridge-shaped connecting section () formed on the first insulating layer to interconnect the first body section and the second body section; a channel region () formed by at least a part of the connecting section in lengthwise direction of the connecting section; a gate electrode () formed to cover a periphery of the channel region, with a second insulating layer intervening therebetween; a source region formed to extend over the first body section and a portion of the connecting section between the first body section and the channel region; and a drain region formed to extend over the second body section and a portion of the connecting section between the second body section and the channel region, wherein a semiconductor forming the channel region has a lattice strain.


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