The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 16, 2008

Filed:

Oct. 16, 2006
Applicants:

Fujio Ito, Hanno, JP;

Hiromichi Suzuki, Tokyo, JP;

Akihiko Kameoka, Ogose, JP;

Noriaki Sakamoto, Kodaira, JP;

Inventors:

Fujio Ito, Hanno, JP;

Hiromichi Suzuki, Tokyo, JP;

Akihiko Kameoka, Ogose, JP;

Noriaki Sakamoto, Kodaira, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/495 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor device comprises a microcomputer chip, an SDRAM which is disposed alongside the microcomputer chip and is thinner than the microcomputer chip, a tub, a plurality of inner leads and outer leads, first wires that connect pads of the microcomputer chip and pads of the SDRAM, and second wires which connect the pads of the microcomputer chip and the inner leads and which are disposed so as to bridge over the SDRAM and are formed with loops at positions higher than loops of the first wires. An interface circuit for a memory bus is connected only between the chips, without connecting to external terminals, and is closed within a package. Therefore, pins can be utilized for other functions correspondingly and a multi-pin configuration can be achieved. Further, the cost of an SIP (semiconductor device) can be reduced owing to the adoption of a frame type.


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