The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 16, 2008

Filed:

Aug. 29, 2006
Applicants:

Kuo-feng Yu, Hsin-Chu, TW;

Jian-hsing Lee, Hsin-Chu, TW;

Yi-hsun Wu, Hsin-Chu, TW;

C.s Tang, Hsinchu, TW;

Inventors:

Kuo-Feng Yu, Hsin-Chu, TW;

Jian-Hsing Lee, Hsin-Chu, TW;

Yi-Hsun Wu, Hsin-Chu, TW;

C.S Tang, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/62 (2006.01);
U.S. Cl.
CPC ...
Abstract

A layout structure for an ESD protection circuit includes a first MOS device area having a first and second doped regions of the same polarity disposed at two sides of a first conductive gate layer, and a third doped region disposed along the first doped region at one side of the first conductive gate layer. The third doped region has a polarity different from that of the first and second doped regions, such that the third doped region and the second doped region form a diode for enhancing dissipation of ESD current during a negative ESD event.


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