Semiconductor memory device having a precharge control circuit for reducing current during continuous write operation

Abstract

We describe a semiconductor memory device having a precharge control circuit and an associated method for precharging the same. A semiconductor memory device having a series of circuits for writing data to memory cells includes an input and output line for transferring data to be written to each of the memory cells. A precharge control circuit is adapted to generate a precharge control signal for controlling a precharge disable state of the input and output line after application of a first write command. The disable state of the precharge control signal is maintained even after application of a second write command when performing a continuous write operation responsive to the second write command application without other commands applied subsequent to the first write command application. Avoiding precharging the input and output line in a continuous write operation, reduces current consumption.