The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 09, 2008
Filed:
Jun. 13, 2006
Trent Whitten, Beaverton, OR (US);
Kam Fai SO, Beaverton, OR (US);
Trent Whitten, Beaverton, OR (US);
Kam Fai So, Beaverton, OR (US);
Lattice Semiconductor Corporation, Hillsboro, OR (US);
Abstract
A programmable logic device may comprise a plurality of programmable resources and non-volatile configuration memory to store configuration data by which to configure the programmable resources. Test override circuitry may determine a test mode and selectively override the configuration data stored in the non-volatile configuration memory during the test mode for configuring the programmable resources based at least in part on test configuration data other than the configuration data stored in the non-volatile memory. A buffer may be operable to drive a configuration select node for at least one of the programmable resources for designating a configuration therefore based on the configuration data of the non-volatile memory. The test override circuitry may comprise a pull-down circuit operable, when enabled dependent on the test configuration data, to drive the buffer with a high/low level capable of overriding a state of the non-volatile configuration memory.