The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 09, 2008

Filed:

Jul. 31, 2006
Applicants:

Yutaka Imai, Tokyo, JP;

Tatsuya Fukumura, Tokyo, JP;

Toshiaki Omori, Tokyo, JP;

Yutaka Takeshima, Tokyo, JP;

Inventors:

Yutaka Imai, Tokyo, JP;

Tatsuya Fukumura, Tokyo, JP;

Toshiaki Omori, Tokyo, JP;

Yutaka Takeshima, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/788 (2006.01); H01L 21/8239 (2006.01); H01L 23/528 (2006.01);
U.S. Cl.
CPC ...
Abstract

A nonvolatile semiconductor memory device includes a semiconductor substrate, a first floating gate formed on a main surface of the semiconductor substrate, a second floating gate formed on the main surface of the semiconductor substrate, a first control gate formed on the first floating gate, a second control gate formed on the second floating gate, an interlayer insulating film, and a gap formed in the interlayer insulating film in at least a portion located between the first and second floating gates. Accordingly, a nonvolatile semiconductor memory device for which variations in threshold voltage of a memory cell can be suppressed and an appropriate read operation can be carried out, as well as a method of manufacturing the nonvolatile semiconductor memory device are provided. Further, a capacitance formed between interconnect lines can be reduced and the drive speed can be improved.


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