The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 02, 2008
Filed:
May. 14, 2004
Keith A. Joyner, Dallas, TX (US);
Mark S. Rodder, University Park, TX (US);
Keith A. Joyner, Dallas, TX (US);
Mark S. Rodder, University Park, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
A method for manufacturing a transistor includes providing a transistor assembly having a semiconductor layer with a first surface, a dielectric layer disposed on the first surface, a gate electrode disposed on the dielectric layer, an insulation layer adjacent at least part of the gate electrode, and a nitride spacer layer adjacent at least part of the insulation layer. The method also includes depositing, on part of the first surface, a material that will react with the semiconductor layer to form silicide and removing the unreacted material. The method further includes etching the nitride spacer layer, depositing a pre-metal spacer layer adjacent at least part of the nitride spacer layer and at least part of the first surface, etch removing a portion of the pre-metal spacer layer to expose part of the silicided portion of the first surface, and forming a contact with the silicided portion of the first surface.