The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 18, 2008
Filed:
Aug. 31, 2006
Chien Yi Chang, Hsinchu, TW;
Chien Yi Chang, Hsinchu, TW;
Abstract
A DRAM bit line precharge voltage generator comprises a first amplifier having a first current source and comparing a first voltage with a precharge voltage to control a first PMOS transistor, a second amplifier having a second current source and comparing a second voltage with the precharge voltage to control a second PMOS transistor, a third amplifier having a third current source and comparing a third voltage with the precharge voltage to control a first NMOS transistor, and a fourth amplifier having a fourth current source and comparing the first voltage with the precharge voltage to control a second NMOS transistor. The precharge voltage feedbacks from an output node connected between the second PMOS transistor and the first NMOS transistor. The DRAM bit line precharge voltage generator with a low-frequency pole provided by the first amplifier, the first PMOS transistor, the fourth amplifier, and the second NMOS transistor exhibits the characteristics of robustness, low standby current and low-output impedance.