The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 18, 2008
Filed:
Aug. 08, 2005
Tsu-jae King, Fremont, CA (US);
Tsu-Jae King, Fremont, CA (US);
Synopsys, Inc., Mountain View, CA (US);
Abstract
A memory cell includes a storage capacitor and a negative differential resistance (NDR) field effect transistor (FET), wherein the NDR FET is connected between a high voltage source and the storage capacitor. A junction between the NDR FET and the storage capacitor forms a storage node of the memory cell. when a logic HIGH value is stored at the storage node, a pulsed gate bias signal turns on the NDR FET. In contrast, when a logic LOW value is stored at the storage node, the pulsed gate bias signal does not turn on the NDR FET. Thus, using the NDR FET as a pull-up element, the memory cell can exhibit a refresh behavior that is dependent on the data value stored in the memory cell. Moreover, this memory cell can be operated without a separate refresh cycle.