The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7450458 B1

PDF
Full Text
Expired
Date of Patent:
Nov. 11, 2008

Filed:

Jan. 30, 2006
Applicants:

Yuki Mori, Tokyo, JP;

Renichi Yamada, Fuchu, JP;

Shuichi Tsukada, Tokyo, JP;

Kiyonori Oyu, Tokyo, JP;

Inventors:

Yuki Mori, Tokyo, JP;

Renichi Yamada, Fuchu, JP;

Shuichi Tsukada, Tokyo, JP;

Kiyonori Oyu, Tokyo, JP;

Assignees:

Hitachi, Ltd., Tokyo, JP;

Elpida Memory, Inc., Tokyo, JP;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 11/34 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention enables screening of the so-called variable retention time (VRT) failure, namely a retention failure occurring in a DRAM due to fluctuation of a data retention time like a random telegraph noise. A pause/refresh test for checking a data retention function is repeated at all memory cells of a chip so that memory cells at which the retention failure due to random fluctuation of the data retention capability over time may occur is subjected to screening.


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Mori, Yuki. (2008). Dynamic random access memories and method for testing performance of the same (U.S. Patent No. 7450458). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7450458

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