The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 04, 2008
Filed:
Jul. 14, 2006
Charles J. Alpert, Cedar Park, TX (US);
Arvind K. Karandikar, Austin, TX (US);
Tuhin Mahmud, Austin, TX (US);
Stephen T. Quay, Austin, TX (US);
Chin Ngai Sze, Austin, TX (US);
Charles J. Alpert, Cedar Park, TX (US);
Arvind K. Karandikar, Austin, TX (US);
Tuhin Mahmud, Austin, TX (US);
Stephen T. Quay, Austin, TX (US);
Chin Ngai Sze, Austin, TX (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A buffer insertion technique addresses slew constraints while minimizing buffer cost. The method builds initial solutions for the sinks, each having an associated cost, slew and capacitance. As a solution propagates toward a source, wire capacitance and wire slew are added to the solution. When a buffer is selected for possible insertion, the slew of the solution is set to zero while the cost of the solution is incremented based on the selected buffer and the capacitance is set to an intrinsic capacitance of the buffer. The solutions of two intersecting wire branches are merged by adding branch capacitances and costs, and selecting the highest branch slew. The solution sets are updated by disregarding solutions which have a slew component greater than a slew constraint, and any solution that is dominated by another solution is eliminated. The solution having the smallest cost is selected as the final solution.