The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 04, 2008
Filed:
May. 04, 2006
Gopalakrishnan Perur Krishnan, Bangalore, IN;
Eswar Vadlamani, Hyderabad, IN;
Tarjinder Singh Munday, Bangalore, IN;
Gopalakrishnan Perur Krishnan, Bangalore, IN;
Eswar Vadlamani, Hyderabad, IN;
Tarjinder Singh Munday, Bangalore, IN;
Cypress Semiconductor Corporation, San Jose, CA (US);
Abstract
A parallel data transmission test system can include a receiver section () having input selector circuits (-O to-N) that provide a received test data to logic adjust circuits (-O to-N) that 'logically align' multiple incoming test values to remove intentionally introduced logic difference (e.g., inversion) with respect to one another. Result combining circuit () can logically combine output data values and provide a resulting sequence to a pattern sequence test circuit ().