The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 14, 2008

Filed:

Nov. 30, 2005
Applicants:

Junichi Nakamura, Nagano, JP;

Tetsuo Sakaguchi, Nagano, JP;

Kazuya Mukoyama, Nagano, JP;

Sachiko Oda, Nagano, JP;

Masahiro Yumoto, Nagano, JP;

Inventors:

Junichi Nakamura, Nagano, JP;

Tetsuo Sakaguchi, Nagano, JP;

Kazuya Mukoyama, Nagano, JP;

Sachiko Oda, Nagano, JP;

Masahiro Yumoto, Nagano, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/44 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of manufacturing a circuit substrate of the present invention, includes the steps of forming an n-layered (n is an integer of 1 or more) wiring layer connected electrically to a metal plate on the metal plate, forming an electroplating layer on a connection pad portion of an uppermost wiring layer of the n-layered wiring layer by an electroplating utilizing the metal plate and the wiring layer as a plating power-supply path, and removing the metal plate.


Find Patent Forward Citations

Nakamura, Junichi. (2008). Method of manufacturing a circuit substrate and method of manufacturing an electronic parts packaging structure (U.S. Patent No. 7435680). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7435680

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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