The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 07, 2008

Filed:

Dec. 15, 2005
Applicants:

Shaestagir Chowdhury, Beaverton, OR (US);

Chi-hwa Tsang, Aloha, OR (US);

Inventors:

Shaestagir Chowdhury, Beaverton, OR (US);

Chi-Hwa Tsang, Aloha, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/44 (2006.01);
U.S. Cl.
CPC ...
Abstract

Methods of fabricating an interconnect utilizing an electroless deposition technique, which fundamentally consists of providing a dielectric material layer having an opening extending into the dielectric material from a first surface thereof, and electrolessly depositing a conductive material within the opening. Various processing steps and structures may be utilized in the fabrication of the interconnect, which may include but is not limited to forming barrier layers, utilizing seed materials, utilizing activation materials, and treating the dielectric material to be receptive to electroless deposition.


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