The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 30, 2008

Filed:

Dec. 13, 2006
Applicants:

Larry R. Fenstermaker, Nazareth, PA (US);

Harold Scholz, Allentown, PA (US);

Inventors:

Larry R. Fenstermaker, Nazareth, PA (US);

Harold Scholz, Allentown, PA (US);

Assignee:

Lattice Semiconductor Corporation, Hillsboro, OR (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/094 (2006.01);
U.S. Cl.
CPC ...
Abstract

A logic circuit is disclosed that is tolerant of logic signals with voltages different from the voltage of the logic circuit power supply. In one embodiment, the logic circuit has an inverting amplifier therein, the amplifier having at least one input and an output and is powered by the power supply. A first transistor, in responsive to the output of the amplifier, biases the input of the amplifier to assure substantially no static current flows through the amplifier when a logic-low is present on the amplifier output. A second transistor couples at least one logic input of the logic circuit to the input of the amplifier. In one embodiment, the second transistor impedes static current flow from the first transistor, through the second transistor, to the logic input. Various other embodiments of the logic circuit include a latch/flip-flop, multiplexer, and a complex logic gate.


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