The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 23, 2008
Filed:
May. 15, 2006
James P. Kardach, Saratoga, CA (US);
Brian V. Belmont, Portland, OR (US);
Muthu K. Kumar, Hillsboro, OR (US);
Riley W. Jackson, Portland, OR (US);
Gunner Danneels, Beaverton, OR (US);
Richard A. Forand, Portland, OR (US);
Vivek Gupta, Portland, OR (US);
Jeffrey L. Huckins, Chandler, AZ (US);
Kristoffer D. Flemming, Chandler, AZ (US);
Uma M. Gadamsetty, Chandler, AZ (US);
James P. Kardach, Saratoga, CA (US);
Brian V. Belmont, Portland, OR (US);
Muthu K. Kumar, Hillsboro, OR (US);
Riley W. Jackson, Portland, OR (US);
Gunner Danneels, Beaverton, OR (US);
Richard A. Forand, Portland, OR (US);
Vivek Gupta, Portland, OR (US);
Jeffrey L. Huckins, Chandler, AZ (US);
Kristoffer D. Flemming, Chandler, AZ (US);
Uma M. Gadamsetty, Chandler, AZ (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A computing system is described that includes a main system bus that remains active while said computing system operates within a non main CPU/OS based operational state. The computing system also includes a controller that operates functional tasks while the computing system is within the non main CPU/OS based operational state. The computing system also includes an I/O unit coupled to the main system bus that remains active while the computing system operates within the non main CPU/OS based operational state.