The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 23, 2008
Filed:
Dec. 03, 2007
OM P. Agrawal, Los Altos, CA (US);
Ravindar M. Lall, Portland, OR (US);
David L. Rutledge, Portland, OR (US);
Tom Gustafson, Portland, OR (US);
Om P. Agrawal, Los Altos, CA (US);
Ravindar M. Lall, Portland, OR (US);
David L. Rutledge, Portland, OR (US);
Tom Gustafson, Portland, OR (US);
Lattice Semiconductor Corporation, Hillsboro, OR (US);
Abstract
A programmable logic device in accordance with an embodiment of the invention includes configurable logic blocks, embedded random access memory (RAM) blocks, and input/output blocks adapted to transfer information into or out of the programmable logic device. An interconnect architecture is adapted to route information among the configurable logic blocks, embedded RAM blocks, and input/output blocks within the programmable logic device. An interface block is provided that couples an embedded RAM block and an input/output block but not a logic block to the interconnect architecture.