The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 16, 2008
Filed:
Apr. 06, 2007
Jonathan Chung, Newark, CA (US);
IN Whan Kim, San Jose, CA (US);
Philip Pan, Fremont, CA (US);
Chiakang Sung, Milpitas, CA (US);
Bonnie Wang, Cupertino, CA (US);
Xiaobao Wang, Santa Clara, CA (US);
Yan Chong, Stanford, CA (US);
Gopinath Rangan, Santa Clara, CA (US);
Khai Nguyen, San Jose, CA (US);
Tzung-chin Chang, San Jose, CA (US);
Joseph Huang, San Jose, CA (US);
Jonathan Chung, Newark, CA (US);
In Whan Kim, San Jose, CA (US);
Philip Pan, Fremont, CA (US);
Chiakang Sung, Milpitas, CA (US);
Bonnie Wang, Cupertino, CA (US);
Xiaobao Wang, Santa Clara, CA (US);
Yan Chong, Stanford, CA (US);
Gopinath Rangan, Santa Clara, CA (US);
Khai Nguyen, San Jose, CA (US);
Tzung-Chin Chang, San Jose, CA (US);
Joseph Huang, San Jose, CA (US);
Altera Corporation, San Jose, CA (US);
Abstract
An input buffer circuit has a plurality of selectively enabled differential amplifier circuits, where each differential amplifier is configured for compatibility with a particular differential I/O standard and its corresponding input operating range. For example, the input buffer may have two differential amplifiers suitable for receiving LVDS differential input signals over a wide input operating range, and another differential amplifier suitable for receiving the PCML differential input signals. One or more control signals are provided to the input buffer, e.g., programmably, to selectively enable the required differential amplifier(s) for a given I/O standard.