The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 09, 2008
Filed:
Dec. 07, 2004
Richard T Schultz, Fort Collins, CO (US);
Robert Waldron, Fort Collins, CO (US);
Norman Mause, Fort Collins, CO (US);
Larry Greenhouse, San Diego, CA (US);
Richard T Schultz, Fort Collins, CO (US);
Robert Waldron, Fort Collins, CO (US);
Norman Mause, Fort Collins, CO (US);
Larry Greenhouse, San Diego, CA (US);
LSI Corporation, Milpitas, CA (US);
Abstract
A system and method for designing a complex electronic circuit by simulating blocks of the circuit using various simulators to produce a net list, designing the physical layout of the circuit using a layout tool that produces a layout verses schematic reference file, mapping the reference file to the net list to create a mapping file, and analyzing the mapping file to verify that the layout meets various criteria. Each block may be verified using simulation tools that are appropriate for that piece of the overall circuit, and using conditions that may maximize the strain on the circuit. The results from the simulations are compared to the physical layout to determine if the physical layout is able to properly conduct the electrical signals.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile