The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 02, 2008
Filed:
Jan. 15, 2003
Applicants:
Cheng Hsiao, Chiai, TW;
Ke-wei Su, Tainan, TW;
Jaw-kang Her, Taipei, TW;
Inventors:
Assignee:
Taiwan Semiconductor Mfg Co, Ltd, Hsin-Chu, TW;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract
Semiconductor device junction simulation is carried out utilizing models that are developed with series resistance extractions that improve their fidelity particularly in the high current regions of device operation. The models may also be tailored to account for geometric considerations of the semiconductor devices thereby allowing for a more flexible model and simulation by providing for geometric scaling capabilities.
Hsiao, Cheng. (2008). Method for extracting and modeling semiconductor device series resistance and for simulating a semiconductor device with use thereof (U.S. Patent No. 7421383). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7421383
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile