The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 26, 2008
Filed:
Oct. 31, 2005
Steven Webster, Miao-li, TW;
Ying-cheng Wu, Miao-li, TW;
Kun-hsieh Liu, Miao-li, TW;
Po-chih Hsu, Miao-li, TW;
Steven Webster, Miao-li, TW;
Ying-Cheng Wu, Miao-li, TW;
Kun-Hsieh Liu, Miao-li, TW;
Po-Chih Hsu, Miao-li, TW;
Altus Technology Inc., Miao-Li Hsien, TW;
Abstract
An IC (integrated circuit) chip package includes a substrate (), a chip (), a plurality of bonding wires (), and a cover (). The substrate has a top surface, a bottom surface, a receiving chamber () defined therein, a plurality of solder pads () arranged around the top surface and the bottom surface, and a plurality of vias () having conductive material electrically connecting the top solder pads with the bottom solder pads defined therein. The chip is mounted in the receiving chamber, and has a plurality of chip solder pads arranged around a top surface thereof. The bonding wires respectively electrically connect the top solder pads of the substrate with the chip solder pads. The cover is fastened to the top surface of the substrate to cover the opening, and has a smaller profile than that of the substrate, thereby not cover a peripheral area of the top surface.