The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7416942 B1

PDF
Full Text
Expired
Date of Patent:
Aug. 26, 2008

Filed:

Feb. 21, 2007
Applicants:

Yukiteru Matsui, Yokohama, JP;

Shinichi Hirasawa, Tokyo, JP;

Atsushi Shigeta, Fujisawa, JP;

Kiyotaka Miyano, Tokyo, JP;

Takeshi Nishioka, Yokohama, JP;

Hiroyuki Yano, Yokohama, JP;

Inventors:

Yukiteru Matsui, Yokohama, JP;

Shinichi Hirasawa, Tokyo, JP;

Atsushi Shigeta, Fujisawa, JP;

Kiyotaka Miyano, Tokyo, JP;

Takeshi Nishioka, Yokohama, JP;

Hiroyuki Yano, Yokohama, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01); H01L 21/8238 (2006.01); H01L 21/461 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for manufacturing a semiconductor device is provided. The method includes successively forming a first silicon film and a mask film above a semiconductor substrate through a gate insulating film, forming a plurality of trenches in the first silicon film and in the mask film to a depth to reach the semiconductor substrate, filling the plurality of trenches with the silicon oxide film, removing the mask film to expose the first silicon film existing between the silicon oxide films, selectively growing a second silicon film on the first silicon film, planarizing the second silicon film using an alkaline slurry exhibiting a pH of 13 or less and containing abrasive grains and a cationic surfactant, thereby obtaining a floating gate electrode film comprising the first and second silicon films, forming an interelectrode insulating film on the entire surface, and forming a control gate electrode film on the interelectrode insulating film.


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Matsui, Yukiteru. (2008). Method for manufacturing semiconductor device (U.S. Patent No. 7416942). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7416942

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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