The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 26, 2008

Filed:

Nov. 02, 2005
Applicant:

Hui-lung Chou, Kaoshiung, TW;

Inventor:

Hui-Lung Chou, Kaoshiung, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for wafer level stack die placement is disclosed. At first, a wafer including a plurality of dice is provided. The wafer is adhered to a photosensitive adhesive tape. The wafer is attached on a die carrier to fix at least one die from the wafer on the die carrier. The die carrier may be another wafer. The photosensitive adhesive tape is selectively exposed to form an adhesion-released portion. The adhesion-released portion is aligned with the fixed die. Then, the photosensitive adhesive tape and the die carrier with the fixed die are apart. Therefore the stack die placement in the die-attaching batch is quick and efficient.


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Chou, Hui-Lung. (2008). Method for wafer level stack die placement (U.S. Patent No. 7416919). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7416919

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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