The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7406365 B1

PDF
Full Text
Expired
Date of Patent:
Jul. 29, 2008

Filed:

Mar. 31, 2006
Applicants:

Annabelle Pratt, Hillsboro, OR (US);

Eugene Gorbatov, Hillsboro, OR (US);

Pavan Kumar, Portland, OR (US);

Tomm V. Aldridge, Olympia, WA (US);

Inventors:

Annabelle Pratt, Hillsboro, OR (US);

Eugene Gorbatov, Hillsboro, OR (US);

Pavan Kumar, Portland, OR (US);

Tomm V. Aldridge, Olympia, WA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G05D 3/12 (2006.01); G05D 5/00 (2006.01); G05D 9/00 (2006.01); G05D 11/00 (2006.01); G05B 11/01 (2006.01); G06F 1/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

In some embodiments, a power manager may be coupled to a load circuit and configured to receive an input signal indicating a line disturbance on a power supply line and to reduce a load requirement of the load circuit in accordance with the received signal. The power manager may be configured to selectively reduce power to components with low entrance latency while continuing to provide full power to components with high entrance latency. Other embodiments are disclosed and claimed.


Find Patent Forward Citations

Loading…