The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 15, 2008

Filed:

Nov. 14, 2005
Applicants:

Haoran Duan, Corvallis, OR (US);

Charles Evans, Corvallis, OR (US);

Michael Alvin Rencher, Corvallis, OR (US);

James R. Emmert, Corvallis, OR (US);

Inventors:

Haoran Duan, Corvallis, OR (US);

Charles Evans, Corvallis, OR (US);

Michael Alvin Rencher, Corvallis, OR (US);

James R. Emmert, Corvallis, OR (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); H03K 17/693 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for implementing package-level intellectual property (PLIP) preverification for system on chip (SOC) devices includes providing at least one externally connected intellectual property (IP) core with an SOC. A package generic unit is provided with the IP core and is configured for providing external interface functions with respect to the SOC, wherein said package generic unit is pre-verified in silicon and independent of the specific packaging of the SOC. A package adaptation unit is provided with the IP core and is configured for providing external interface functions with respect to the SOC, wherein the package adaptation unit is pre-verified in silicon and dependent upon the specific packaging of the SOC.


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