The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 15, 2008

Filed:

Dec. 29, 2000
Applicants:

Sailesh Kottapalli, Milpitas, CA (US);

Udo Walterscheidt, San Jose, CA (US);

Inventors:

Sailesh Kottapalli, Milpitas, CA (US);

Udo Walterscheidt, San Jose, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/48 (2006.01); G06F 9/312 (2006.01);
U.S. Cl.
CPC ...
Abstract

In a multi-threaded processor, a long latency data dependent thread is flushed from the execution pipelines. Once the stalled thread is flushed, the non-stalling threads in the pipeline can continue their execution. Several resources are used to reduce this unwanted impact of stalls on the non-stalling threads. Also, these resources ensure that the earlier stalled thread, now flushed, is re-executed when the data dependency is resolved.


Find Patent Forward Citations

Kottapalli, Sailesh. (2008). Method for converting pipeline stalls caused by instructions with long latency memory accesses to pipeline flushes in a multithreaded processor (U.S. Patent No. 7401211). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7401211

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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