The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 15, 2008

Filed:

Dec. 21, 2005
Applicants:

Young-soo Joung, Seoul, KR;

Yoon-dong Park, Yongin-si, KR;

In-kyeong Yoo, Suwon-si, KR;

Myoung-jae Lee, Suwon-si, KR;

Sun-ae Seo, Hwaseong-si, KR;

Hye-young Kim, Seongnam-si, KR;

Seung-eon Ahn, Seoul, KR;

David Seo, Yongin-si, KR;

Inventors:

Young-Soo Joung, Seoul, KR;

Yoon-Dong Park, Yongin-si, KR;

In-Kyeong Yoo, Suwon-si, KR;

Myoung-Jae Lee, Suwon-si, KR;

Sun-Ae Seo, Hwaseong-si, KR;

Hye-Young Kim, Seongnam-si, KR;

Seung-Eon Ahn, Seoul, KR;

David Seo, Yongin-si, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/62 (2006.01);
U.S. Cl.
CPC ...
Abstract

A nonvolatile memory device having two or more resistors and methods of forming and using the same. A nonvolatile memory device having two resistance layers, and more particularly, to a nonvolatile memory device formed and operated using a resistance layer having memory switching characteristics and a resistance layer having threshold switching characteristics. The nonvolatile semiconductor memory device may include a lower electrode; a first resistance layer having at least two resistance characteristics formed on the lower electrode, a second resistance layer having threshold switching characteristics formed on the first resistance layer, and an upper electrode formed on the second resistance layer.


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