The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 08, 2008

Filed:

Aug. 11, 2005
Applicants:

Freidoon Mehrad, Plano, TX (US);

Shaofeng Yu, Plano, TX (US);

Joe G. Tran, Flower Mound, TX (US);

Inventors:

Freidoon Mehrad, Plano, TX (US);

Shaofeng Yu, Plano, TX (US);

Joe G. Tran, Flower Mound, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/311 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention provides a method of fabricating a microelectronics device. In one aspect, the method comprises forming a capping layerover gate structureslocated over a microelectronics substratewherein the gate structuresinclude sidewall spacersand have a doped regionlocated between them. A protective layeris placed over the capping layerand the doped region, and a portion of the protective layerand capping layerthat are located over the gate structures are removed to expose a top surface of the gate structures. A remaining portion of the protective layerand capping layerremains over the doped region. With the top surface of the gate structuresexposed, metal is incorporated into the gate structures to form gate electrodes


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