Semiconductor device and manufacturing method thereof

Abstract

In a conventional semiconductor device, for example, a MOS transistor, there is a problem that a parasitic transistor is prone to be operated due to an impurity concentration in a back gate region and a shape of diffusion thereof. In a semiconductor device of the present invention, for example, a MOS transistor, a P type diffusion layeras the back gate region, and an N type diffusion layeras a drain region, are formed in an N type epitaxial layer. In the P type diffusion layer, an N type diffusion layeras a source region and a P type diffusion layerare formed. The P type diffusion layeris formed by performing ion implantation twice so as to correspond to a shape of a contact hole. Moreover, impurity concentrations in surface and deep portions of the P type diffusion layerare controlled. By use of this structure, a device size is reduced, and an operation of a parasitic NPN transistor is suppressed.