The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 17, 2008
Filed:
May. 09, 2005
Robert J. Allen, Jericho, VT (US);
Daria R. Dooling, Huntington, VT (US);
Jason D. Hibbeler, Williston, VT (US);
Daniel N. Maynard, Craftsbury Common, VT (US);
Sarah C. Prue, Richmond, VT (US);
Ralph J. Williams, Essex Junction, VT (US);
Robert J. Allen, Jericho, VT (US);
Daria R. Dooling, Huntington, VT (US);
Jason D. Hibbeler, Williston, VT (US);
Daniel N. Maynard, Craftsbury Common, VT (US);
Sarah C. Prue, Richmond, VT (US);
Ralph J. Williams, Essex Junction, VT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A system, method and program product for predicting yield of a VLSI design. A method is provided including the steps of: identifying and grouping sub-circuits contained within an integrated circuit design by type; calculating critical area values for regions within the integrated circuit design; and applying different yield models to critical area values based on the types of the regions used to calculate the critical area values, wherein each yield model is dependent on a type.