The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 03, 2008
Filed:
Jan. 06, 2005
Anthony M. Chiu, Richardson, TX (US);
Yinon Degani, Highland Park, NJ (US);
Charley Chunlei Gao, Plano, TX (US);
Kunquan Sun, Plano, TX (US);
Liquo Sun, Plano, TX (US);
Anthony M. Chiu, Richardson, TX (US);
Yinon Degani, Highland Park, NJ (US);
Charley Chunlei Gao, Plano, TX (US);
Kunquan Sun, Plano, TX (US);
Liquo Sun, Plano, TX (US);
Sychip Inc., Plano, TX (US);
Abstract
The specification describes a multi-chip module (MCM) that contains an integrated passive device (IPD) as the carrier substrate (IPD MCM). Parasitic electrical interactions are controlled at one or both interfaces of the IPD either by eliminating metal from the interfaces, or by selective use of metal in parts of the MCM that are remote from the sensitive device components. The sensitive device components are primarily analog circuit components, especially RF inductor elements. In the IPD layout, the sensitive components are segregated from other components. This allows implementation of the selective metal approach. It also allows parasitic interactions on top of the IPD substrate to be reduced by selective placement of IC semiconductor chips and IC chip ground planes. In preferred embodiments of the IPD MCM of the invention, the IPD substrate is polysilicon, to further minimize RF interactions. The various methods of assembling the module may be adapted to keep the overall thickness within 1.0 mm.