The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 03, 2008
Filed:
Jan. 04, 2006
Robert M. Japp, Vestal, NY (US);
John M. Lauffer, Waverly, NY (US);
Voya R. Markovich, Endwell, NY (US);
William E. Wilson, Waverly, NY (US);
Robert M. Japp, Vestal, NY (US);
John M. Lauffer, Waverly, NY (US);
Voya R. Markovich, Endwell, NY (US);
William E. Wilson, Waverly, NY (US);
Endicott Interconnect Technologies, Inc., Endicott, NY (US);
Abstract
A method of making a circuitized substrate and an electrical assembly utilizing same in which the substrate is comprised of at least two sub-composites in which the dielectric material of at least one of these sub-composites is heated during bonding (e.g., lamination) to the other sufficiently to cause the dielectric material to flow into and substantially fill openings in a conductive layer for the bonded structure. Conductive thru-holes are formed within the bonded structure to couple selected ones of the structure's conductive layers. Formation of an electrical assembly is possible by positioning one or more electrical components (e.g., semiconductor chips or chip carriers) on the final structure and electrically coupling these to the structure's external circuitry.