The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 06, 2008

Filed:

Feb. 27, 2004
Applicants:

Takeshi Hosomi, Tokyo, JP;

Masako Yamashita, Joetsu, JP;

Takayuki Baba, Tokyo, JP;

Kentaro Yabuki, Soja, JP;

Inventors:

Takeshi Hosomi, Tokyo, JP;

Masako Yamashita, Joetsu, JP;

Takayuki Baba, Tokyo, JP;

Kentaro Yabuki, Soja, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
C08K 3/36 (2006.01); B32B 5/16 (2006.01); B05B 5/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A resin composition which can be used to form a prepreg having sufficient flexibility to prevent cracking from occurring therein is provided. Further, a prepreg having sufficient flexibility to prevent cracking from occurring, a prepreg having excellent workability even in the case where the resin composition in the prepreg is in an uncured state, and a laminate provided with such a prepreg are also provided. The resin composition is used to form a sheet-shaped prepreg by impregnating a base material with the resin composition, and the composition comprises a first thermosetting resin, a second thermosetting resin having a lower weight average molecular weight than that of the first thermosetting resin, a curing agent, and a filler. The prepreg is formed by impregnating a base sheet material with the resin composition described above. The laminate is formed by laminating a metallic foil on the prepreg and then molding them by heating under pressure. A semiconductor package is manufactured by mounting an IC chip on a prepreg on which the metallic foil has been laminated.


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