The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 29, 2008
Filed:
Dec. 16, 2003
Chih-chao Yang, Beacon, NY (US);
Louis L. Hsu, Fishkill, NY (US);
Keith Kwong Hon Wong, Wappingers Falls, NY (US);
Timothy Joseph Dalton, Ridgefield, CT (US);
Carl Radens, LaGrangeville, NY (US);
Larry Clevenger, LaGrangeville, NY (US);
Chih-Chao Yang, Beacon, NY (US);
Louis L. Hsu, Fishkill, NY (US);
Keith Kwong Hon Wong, Wappingers Falls, NY (US);
Timothy Joseph Dalton, Ridgefield, CT (US);
Carl Radens, LaGrangeville, NY (US);
Larry Clevenger, LaGrangeville, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A method of making a diffusion barrier for a interconnect structure. The method comprises: providing a conductive line in a bottom dielectric trench; depositing a sacrificial liner on the cap layer; depositing an interlayer dielectric; forming a trench and a via in the top interlayer dielectric; and removing a portion of the cap layer and the sacrificial layer proximate to the bottom surface of the via. The removed portions of the cap layer and sacrificial layer deposit predominantly along the lower sidewalls of the via. The conductive line is in contact with a cap layer, and the sacrificial layer is in contact with the cap layer. The invention is also directed to the interconnect structures resulting from the inventive process.