The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 22, 2008
Filed:
Aug. 31, 2004
Tsvika Kurts, Haifa, IL;
Alon Naveh, Ramat Hasharon, IL;
Efraim Rotem, Haifa, IL;
Brad M. Dendinger, Hillsboro, OR (US);
Jorge P. Rodriguez, Portland, OR (US);
Ernest Knoll, Haifa, IL;
David I. Poisner, Folsom, CA (US);
Tsvika Kurts, Haifa, IL;
Alon Naveh, Ramat Hasharon, IL;
Efraim Rotem, Haifa, IL;
Brad M. Dendinger, Hillsboro, OR (US);
Jorge P. Rodriguez, Portland, OR (US);
Ernest Knoll, Haifa, IL;
David I. Poisner, Folsom, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
An integrated circuit device, such as a processor initiates a transition to a first power management state. The device then receives a request to exit the first power management state and, in response exits the first power management state at the highest of a reference operating voltage, such as a minimum operating voltage, and a current voltage. For one aspect, an analog to digital converter may be used to determine the current voltage level. Further, for one aspect the first power management state may be a deeper sleep (C) state, and the processor may quickly exit to a Cstate in response to a bus event such as a bus snoop.