The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 22, 2008

Filed:

Dec. 15, 1997
Applicant:

Srinivasan Rajagopalan, Palo Alto, CA (US);

Inventor:

Srinivasan Rajagopalan, Palo Alto, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/00 (2006.01); G06F 5/06 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method and apparatus is presented that can provide first and second windows for driving data onto a bus in dependence on bus clock frequency. In one example, the speed of the bus clock is determined by a component such as a processor. If the bus clock frequency is at a first, relatively high frequency, data is driven onto the bus in an earlier time window (e.g., near the rising edge of the bus clock signal). If the bus clock frequency is at a second, lower frequency, data is driven onto the bus in a second, later time window (e.g., near the center of the high level of the bus clock). Accordingly, the time window for receiving the data driven onto the bus need not be changed (e.g., near the rising edge of the next bus clock signal) allowing components to work effectively with both bus clock frequencies.


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